The present invention relates to a voltage controlled oscillation device and, more particularly, to a voltage controlled oscillation device which can be suitably applied to a PLL (Phase Locked Loop) circuit of a microwave communication device.
In recent years, large-capacity data communications using microwave communication channels have been executed between even compact terminal apparatuses. Accordingly, use of multilevel transmission signals have been promoted in order to effectively use the radio wave resources.
Multilevel radio transmission signals readily cause transmission errors due to the influence of phase noise. For transmission apparatuses for transmitting multilevel radio signals, the phase noise of a local oscillator in a frequency converter is required to be reduced to improve the transmission quality. In addition, to effectively use free frequency channels, a local oscillator is required to allow its oscillation frequency to change over a wider frequency band.
A fixed-frequency oscillator or a voltage controlled oscillator capable of controlling the frequency in accordance with an external control voltage is generally used as a local oscillator. An example of a conventional fixed-frequency low-phase-noise microwave oscillator is a dielectric oscillator using a dielectric resonator. The dielectric oscillator is constituted by an oscillation active element and a dielectric resonator. As a characteristic feature of the dielectric resonator, since the Q factor (Quality factor) is high, phase noise near the carrier of the oscillator output is low.
In the dielectric oscillator, however, the oscillation frequency is determined by the resonance frequency of the dielectric resonator. The resonance frequency of the dielectric resonator readily varies due to the electromagnetic coupling to peripheral elements or a change in temperature. For this reason, the dielectric oscillator has a problem that the oscillation frequency is less stable than, e.g., a quartz oscillator.
An arrangement has been proposed in which the output signal from a voltage controlled oscillator is synchronized with an oscillator such as a quartz oscillator having a stable frequency using a PLL circuit, thereby improving the stability of oscillation frequency. The voltage controlled oscillator in this arrangement is generally constituted by an oscillation active element, a resonator, and a varactor diode coupled to the resonator. In this arrangement, the reverse bias voltage of the varactor diode is controlled to change the reactance, thereby controlling the output frequency of the oscillator.
In the voltage controlled oscillator with the above arrangement, since the phase noise can be made low as the Q factor of the resonator becomes high, a dielectric resonator is often used in a microwave oscillator. An example is a voltage controlled oscillator disclosed in Japanese Patent Laid-Open No. 9-191215 (reference 1). The voltage controlled oscillator described in reference 1 comprises a tuning circuit section capable of changing the tuning frequency, an oscillator section, and a high-pass filter inserted therebetween.
The oscillator section is designed to have a capacitive input impedance in its oscillation frequency band. The high-pass filter on the input side is designed to conversely cause a phase lead, thereby compensating for the capacitive input impedance of the oscillator section. With this arrangement, a voltage controlled oscillator which suppresses the shift between the oscillation frequency and the resonance frequency of the dielectric resonator and can change the oscillation frequency is obtained.
It is also important for a voltage controlled oscillator to ensure a wide frequency variable band. As a means for widening the oscillation frequency variable band, a structure which strengthens coupling between the resonator and the varactor diode is generally employed. However, since the Q factor of the varactor diode is not high, the total Q factor becomes low as the coupling to the resonator is strengthened, resulting in degradation in phase noise characteristic near the carrier. When the Q factor of the resonator is made high in order to improve the phase noise characteristic, the frequency variable band becomes narrow, resulting in difficulty in widening the frequency band.
Since the voltage controlled oscillator disclosed in reference 1 employs the arrangement for controlling the oscillation frequency using the varactor diode, the low phase noise and wide frequency variable band cannot be simultaneously realized, as described above. The low phase noise and wide frequency variable band in the voltage controlled oscillator have tradeoff relationships and can hardly be simultaneously realized.
To simultaneously realize the low phase noise and wide frequency variable band in the voltage controlled oscillator in the microwave band, the following arrangements can be used, though they have problems.
As the first arrangement, a low-phase-noise element such as a quartz oscillator is used as a reference signal source for phase comparison. With this arrangement, the phase noise of the voltage controlled oscillator can be suppressed to the phase noise level of the reference signal source at maximum in a band (loop band) corresponding to a feedback gain of 1 or more in the loop. However, since the phase noise can be suppressed by the loop only in the loop band, the phase noise characteristics cannot be improved in a detuning frequency band falling outside the loop band.
As the second arrangement, a PLL circuit using an integer frequency divider can be used. In this arrangement, however, the phase comparison frequency must be equal to or lower than the minimum settable frequency interval (step frequency) of the output frequency. In addition, the loop band cannot be set beyond the phase comparison frequency. Hence, when the step frequency is low, the phase noise can hardly be suppressed in a wide band by the PLL circuit.
As the third arrangement, a fractional frequency divider or direct digital synthesizer circuit can be combined with a PLL circuit. With this arrangement, a low step frequency and wide loop band can be consistent. However, the circuit of this type generally has a digital calculator which rounds the values at digit positions lower than the significant digit position of a calculation result and therefore always generates a small error. Such small errors are accumulated every time calculation is repeated, and canceled when the magnitude has reached the significant digit position, resulting in a spurious low frequency.
As the fourth arrangement, a method has been proposed in which frequency variations outside the loop band of a PLL are suppressed using a delay detector to reduce the phase noise over a wide band. An example is a frequency synthesizer disclosed in Japanese Patent Laid-Open No. 9-321619 (reference 2). The frequency synthesizer disclosed in reference 2 comprises a delay detector for detecting the delay of the output signal, a phase locked loop (PLL), and a coupling circuit for coupling the output signals to output the control voltage for the voltage controlled oscillator. The coupling circuit comprises a first low-pass filter for a PLL circuit output signal, a high-pass filter for a delay detector output signal, and a second low-pass filter for synthesizing the output signals to generate the control voltage for the voltage controlled oscillator.
With this arrangement, in a high-frequency band where the phase noise suppressing effect by the PLL becomes small, the phase noise suppressing effect is obtained using the delay detector output signal, thereby obtaining the phase noise suppressing effect in a wider band. However, the frequency synthesizer disclosed in reference 2 has a complex circuit arrangement, and therefore, the device undesirably becomes bulky and expensive.
As the fifth arrangement, a multiple PLL circuit in which a plurality of PLLs are combined can be used. However, since this arrangement increases the circuit scale in proportion to the number of loops, the device undesirably becomes bulky and expensive, like the fourth arrangement. In addition, in this arrangement, since a plurality of frequency components are simultaneously processed, a spurious frequency is generated.
As described above, in the conventional voltage controlled oscillator, the low phase noise and wide output frequency variable band have tradeoff relationships and can hardly be simultaneously realized. This is because when coupling between the resonator and the varactor diode is strengthened to widen the output frequency variable band, the total Q factor of the resonator lowers to degrade the phase noise characteristics. Various kinds of arrangements conventionally used have the following problems.
As the first problem, when a low-phase-noise element such as a quartz oscillator is used as a reference signal source for phase comparison, the phase noise characteristics cannot be improved in the detuning frequency band falling outside the loop band. This is because the phase noise can be suppressed by the loop only in the loop band.
As the second problem, when a PLL circuit using an integer frequency divider is used to prevent degradation in phase noise characteristics, a wide loop band can hardly be ensured when the step frequency is made low, so a sufficient phase noise suppressing band cannot be obtained. This is because of the principle of the PLL circuit using the integer frequency divider in which the loop band must be lower than the step frequency.
As the third problem, when a fractional frequency divider or direct digital synthesizer is used in a PLL circuit to widen the phase noise suppressing band, a spurious low frequency is generated. The reason for this is that the fractional frequency divider or direct digital synthesizer uses a digital calculator, and accumulation and cancel of small errors due to rounding of the calculation result of the digital calculator are periodically repeated.
As the fourth problem, when a delay detector is used to widen the phase noise suppressing band, the circuit scale becomes large and complex.
As the fifth problem, when a multiple PLL circuit which combines a plurality of PLLs is used, the circuit scale becomes large and complex in proportion to the number of loops. In addition, since a plurality of frequency components are simultaneously processed, a spurious frequency is generated.